The present invention relates to semiconductor integrated circuit devices and method for designing the devices.
With improvement in the performance of, and increase in the scale of integration of, semiconductor integrated circuit devices, increase in power consumption becomes a serious problem. In particular, semiconductor integrated circuit devices used in the field of mobile communication operate with limited amounts of power. Therefore, reduction of power consumption is an important task for the devices.
As a method for reducing power consumption in a semiconductor integrated circuit device, there is a technique of controlling a voltage to be applied to a circuit block constituting the semiconductor integrated circuit device. In this technique, a power supply voltage to be supplied to a circuit block is stepped down to a given value or supply of the power supply voltage is shut off, for every circuit block. In this manner, power reduction in the semiconductor integrated circuit device is achieved (see Japanese Patent No. 3117910).
However, since the control is performed on every circuit block with the technique described above, it is difficult to further reduce the power consumption in the semiconductor integrated circuit device.
In addition, with the downsizing of elements in the semiconductor integrated circuit device, voltage drop is caused by, for example, an IR-Drop effect, resulting in difficulty in achieving high-speed operation which is a purpose of the semiconductor integrated circuit device.